(China (Mainland))
Product Summary
The LC4032V-75T48C is an In-System Programmable SuperFAST High Density PLD. It consists of multiple 36-input, 16-macrocell Generic Logic Blocks (GLBs) interconnected by a Global Routing Pool (GRP). Output Routing Pools (ORPs) connect the GLBs to the I/O Blocks (IOBs), which contain multiple I/O cells.
Parametrics
LC4032V-75T48C absolute maximum ratings: (1)Supply Voltage (VCC): -0.5 to 5.5V; (2)Output Supply Voltage (VCCO): -0.5 to 4.5V; (3)Input or I/O Tristate Voltage Applied: -0.5 to 5.5V; (4)Storage Temperature: -65 to 150℃; (5)Junction Temperature (Tj) with Power Applied: -55 to 150℃.
Features
LC4032V-75T48C features: (1)High Performance: fMAX = 400MHz maximum operating frequency; tPD = 2.5ns propagation delay; Up to four global clock pins with programmable clock polarity control; Up to 80 PTs per output; (2)Ease of Design: Enhanced macrocells with individual clock, reset, preset and clock enable controls; Up to four global OE controls; Individual local OE control per I/O pin; Excellent First-Time-FitTM and refit; Fast path, SpeedLockingTM Path, and wide-PT path; Wide input gating (36 input logic blocks) for fast counters, state machines and address decoders.
Diagrams
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 LC4032V-75T48C |
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CPLD - Complex Programmable Logic Devices 3.3V 32 I/O |
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LC401 |
Other |
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Negotiable |
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LC4021 |
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Negotiable |
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LC4032B-10T44I |
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CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD |
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LC4032B-10T48I |
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CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD |
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LC4032B-10TN44I |
Lattice |
CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD |
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LC4032B-10TN48I |
Lattice |
CPLD - Complex Programmable Logic Devices PROGRAMMABLE SUPER FAST HI DENSITY PLD |
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